Method for controlling the output voltage of a DC-DC converter

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

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G05F 156

Patent

active

060257067

ABSTRACT:
A DC--DC converter includes an offset comparator that compares an output voltage with a reference voltage in parallel with an error amplification circuit, which also compares the output voltage with the reference voltage. The offset comparator has a predetermined offset voltage set between its input terminals so that the offset comparator outputs a high signal when the voltage difference between its inputs exceeds the predetermined level. The output of the offset comparator is input, along with the error amplification circuit output, into a PWM comparator. The signal output by the offset voltage comparator allows the DC--DC converter to more quickly respond to a sudden increase in current consumption by a connected load. In responding to the increased current draw, the DC--DC converter quickly converges back at the reference voltage, such that the DC--DC converter provides a very stable output voltage.

REFERENCES:
patent: 5572112 (1996-11-01), Saeki et al.
patent: 5694305 (1997-12-01), King et al.
patent: 5745352 (1998-04-01), Sandri et al.
patent: 5781100 (1998-07-01), Saeki et al.
patent: 5831418 (1998-11-01), Kitagawa

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