Fishing – trapping – and vermin destroying
Patent
1988-04-29
1989-12-19
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 31, 437233, 437186, 148DIG124, 148DIG11, 357 59, H01L 21265
Patent
active
048883069
ABSTRACT:
A semiconductor device comprising a semiconductor substrate with at least one semiconductor region formed in it, a polycrystalline silicon layer formed in contact with the semiconductor region and a metal layer formed on the polycrystalline silicon layer. The peripheral portion and outer edges of the polycrystalline silicon layer are covered with an insulation layer.
REFERENCES:
patent: 3915767 (1975-10-01), Welliver
patent: 4089103 (1978-05-01), Hendrickson
patent: 4197632 (1980-04-01), Aomura
patent: 4210996 (1980-07-01), Amemiya
patent: 4224088 (1980-09-01), Komatsu et al.
patent: 4279671 (1981-07-01), Komatsu
patent: 4416049 (1970-05-01), McElroy
Inoue Hiroshi
Komatsu Shigeru
Hearn Brian E.
McAndrew Kevin
Tokyo Shibaura Denki Kabushiki Kaisha
LandOfFree
Method of manufacturing a bipolar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing a bipolar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a bipolar transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1902783