Data error detection and correction

Details Data error detection and correction Data error detection and correction

1996-06-05

2000-02-15

Baker, Stephen M.

Excavating

371 4018, G06F 1110, G11C 2900, H03M 1300

Patent

active

060244860

ABSTRACT:
Data errors on a communications channel in a computer system are corrected. The data is transmitted over the communications channel in a sequence of time-multiplexed phases. A storage device accumulates the phases of data. An error detector and correction device checks the accumulated data for a data error and corrects the data error. The error detection and correction device can correct a one-bit data error, a two-bit data error, and a three-bit data error. Multiple bit errors can be corrected if the multiple bits of data are transmitted over one cable wire in multiple time phases. The communications channel carries the data over N sub-channels, and a parity check generator employs a predetermined parity check matrix based upon the N sub-channels and a probability that multiple errors in the accumulated data are attributable to a faulty sub-channel that affects the same data position in different time phases of the data. The error detection and correction device is operated based upon the parity check matrix. The communications channel includes a cable having N wire pairs, and the N sub-channels include the N wire pairs.

REFERENCES:
patent: 3868632 (1975-02-01), Hong et al.
patent: 4099160 (1978-07-01), Flagg
patent: 5107503 (1992-04-01), Riggle et al.
patent: 5226043 (1993-07-01), Pughe, Jr. et al.
patent: 5331645 (1994-07-01), Miller et al.
patent: 5331646 (1994-07-01), Krueger et al.
patent: 5404361 (1995-04-01), Casorso et al.
patent: 5452261 (1995-09-01), Chung et al.
patent: 5481552 (1996-01-01), Aldereguia et al.
patent: 5490199 (1996-02-01), Abdoo et al.
patent: 5577004 (1996-11-01), Leshem
patent: 5691996 (1997-11-01), Chen et al.
Kaneda, "A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications", IEEE Trans. On Computers, vol. C-33, No. 8, pp. 737-739 (1984).
Rao, et al., "Error-Control Coding for Computer Systems", Prentice-Hall, pp. 261-293 (1989).
Rao et al., "Error-Control Coding for Computer Systems", Prentice-Hall, Inc., Dec. 1989, pp. 299-307.
D.C. Bossen, "b-Adjacent Error Correction", IBM J. Res. Develop., pp. 402-408 (Jul. 1970).
Shu Lin et al., "Error Control Coding, Fundamentals and Applications", pp. 9-81, Prentice-Hall, (1982).
Francis Y.C. Fung, "A Survey of the Theory of Error-Correcting Codes", (Undated--located in Internet).
M.Y. Hsiao, "A Class of Optimal Minimal Odd-Weight-Columnm SEC-DED Codes", IBM J. Res. Develop., pp. 395-400 (Jul. 1970).
H. Hoeve et al., "Error Correction and Concealment in the Compact Disc System", Phillips Technical Review, vol. 40, pp. 166-172 (1982).
Olarig et al., U.S. Patent Application Ser. No. 08/599,757, filed Feb. 12, 1996.

Affiliated with

Also associated with

Rating

Data error detection and correction does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data error detection and correction, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data error detection and correction will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1900550