Patent
1990-12-14
1992-02-25
James, Andrew J.
357 237, 357 49, 357 42, 357 55, 357 71, 357 75, H01L 2978
Patent
active
050917625
ABSTRACT:
A semiconductor memory device comprises a plurality of conductive planar members stacked while being spaced at predetermined distances, a plurality of conductive wires passing through the planar members, and switching elements and capacitance elements. Both types of elements are formed in the vicinity of each of the cross points of the conductive planar members and the wires.
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Muller et al, Device Electronics for IC's, 1986, pp. 450-454.
`New Vertical Stacked Transistor . . . `, IBM Tech., vol. 32, No. 3B, Aug. 89, pp. 177-182.
James Andrew J.
Kabushiki Kaisha Toshiba
Meier Stephen D.
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