Fishing – trapping – and vermin destroying
Patent
1994-11-21
1996-05-14
Fourson, George
Fishing, trapping, and vermin destroying
437 26, 437 33, 437 38, 437162, 437192, 437200, 437203, 148DIG10, 148DIG11, 148DIG124, 257197, 257565, 257586, H01L 21265
Patent
active
055167098
ABSTRACT:
A method of manufacturing a bipolar transistor including the steps of doping an impurity of the one conductivity type in a major surface portion of the semiconductor substrate to form a buried layer of the one conductivity type and growing an epitaxial layer on an entire surface on a major surface of the semiconductor substrate, forming a diffusion region of the opposite conductivity type in an emitter formation region on the major surface of the semiconductor substrate and forming a base connecting region in a base formation region to be in contact with the diffusion region of the opposite conductivity type, forming an insulating interlayer on the major surface of the semiconductor substrate including the diffusion region of the opposite conductivity type and the base connecting region, forming an emitter electrode layer contact hole reaching the diffusion region of the opposite conductivity type in an emitter formation region of the insulating interlayer and forming a collector region hole reaching the epitaxial layer in a collector formation region of the insulating interlayer, depositing a polysilicon film on the insulating interlayer and in the emitter electrode layer contact hole and the collector region hole, forming a patterning mask on the polysilicon film in the emitter formation region, patterning the patterning mask to leave a polysilicon film serving as an emitter electrode layer, and, at the same time, removing the epitaxial layer in the collector formation region by etching to form a collector groove.
REFERENCES:
patent: 4965217 (1990-10-01), Desilets et al.
patent: 4983532 (1991-01-01), Mitani et al.
patent: 5034338 (1991-07-01), Neppl et al.
patent: 5096843 (1992-03-01), Kodaira
patent: 5358882 (1994-10-01), Bertagnolli et al.
patent: 5424227 (1995-06-01), Dietrich et al.
Fourson George
NEC Corporation
Pham Long
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