Semiconductor device having isolation regions

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357 55, 357 59, 357 84, H01L 2704

Patent

active

044700628

ABSTRACT:
Disclosed is a semiconductor device having an isolation region which includes a fine groove extending from the surface of a semiconductor layer into the semiconductor layer, an insulating layer formed on the wall portion of the fine groove, and a semiconductor layer formed on the insulating layer so as to fill up the fine groove, the semiconductor layer serving as an electrode for providing a fixed potential thereto.

REFERENCES:
patent: 3431468 (1969-03-01), Huffman
patent: 4036706 (1977-07-01), Scherrer
patent: 4037306 (1977-07-01), Gutteridge et al.
patent: 4048649 (1977-09-01), Bohn
patent: 4145703 (1979-03-01), Blanchard et al.
Yoshida et al., IEEE J. of Solid State Circuits, vol. SC 11, No. 4, Aug. 1976, pp. 472-477.
Sanders et al., IEEE IEDM, Tech. Digest, Dec. 1973, pp. 38-40.

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