SOI/semiconductor heterostructure fabrication by wafer bonding o

Fishing – trapping – and vermin destroying

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148DIG12, 148DIG135, 437 86, 437200, 437974, H01L 2120, H01L 2176

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051028212

ABSTRACT:
This is a method of forming a semiconductor-on-insulator wafer from two individual wafers. The method comprises: forming a layer of metal (e.g. titanium 24) on a first wafer; forming an insulator (e.g. oxide 32) on a second wafer; forming a bonding layer (e.g. poly 38) over the insulator; anisotropically etching the bonding layer forming chambers in the bonding layer; stacking the first and second wafers with the metal against the second wafer's bonding layer; forming a chemical bond between the metal layer and the bonding layer (e.g. between the titanium 20 and the poly 38) in a vacuum chamber, thereby creating micro-vacuum chambers (42) between the wafers; selectively etching the second wafer to form a thin semiconductor layer (e.g. epi layer 30). This is also a semiconductor-on-insulator wafer. The wafer comprises: a substrate (e.g. semiconductor substrate 20); a layer of metal (e.g. titanium 24) and semiconductor (e.g. silicide 40) over the substrate; a bonding layer (e.g. poly 38) over the metal and semiconductor, with micro-vacuum chambers (42) in the bonding layer; an insulator (e.g. oxide 32) over the bonding layer; and a single-crystal semiconductor layer (e.g. epi lyaer 30) over the insulator.

REFERENCES:
Silicon-On-Insulator (SOI) by bonding and Etch-Back, J. B. Lasky, et al.; IEEE, pp. 684-687, 1985.
46th Annual Device research Conference; Jun. 20-22, 1988; Sponsored by the IEEE Electron Devices Society.
Silicon-On-Insulator Wafer Bonding-Wafer Thinning Technological Evaulations; J. Haisma, et al.; vol. 28, No. 8, Aug., 1989, pp. 1426-1443.
SOI-Device on Bonded Wafer; Hiroshi Gotou, et al.; Fujitsu Sci. Tech. J., 24, 4, pp. 408-417 (Dec. 1988).

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