Excavating
Patent
1987-08-03
1989-09-26
Eisenzopf, Reinhard J.
Excavating
371 251, G01R 3100, G01R 3102
Patent
active
048703451
ABSTRACT:
A semiconductor integrated circuit includes cascaded asynchronous sequential logic circuits. Scanning shift registers are provided between the asynchronous sequential circuits to permit test data to be applied to the inputs of the circuits and to latch and shift out output data provided by the circuits in response to the test data. Additional gating circuitry is provided between the scanning shift registers and the inputs of the asynchronous sequential circuits to prevent new data latched into the scanning shift register from causing the asynchronous sequential circuit connected to the scanning shift register output from changing state during testing. This same additional circuitry may be used to provide pulses of controlled width and/or timing to asynchronous sequential circuit inputs in response to externally generated gating control signals.
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Arakawa Takahiko
Hanibuchi Toshiaki
Kishida Satoru
Sakashita Kazuhiro
Tomioka Ichiro
Burns W.
Eisenzopf Reinhard J.
Mitsubishi Denki & Kabushiki Kaisha
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