Superscaler microprocessor employing a parallel mask decoder

Details Superscaler microprocessor employing a parallel mask decoder Superscaler microprocessor employing a parallel mask decoder

1995-08-31

1998-07-14

Donaghue, Larry D.

395580, 395386, 395382, 395391, G06F 930

Patent

active

057817898

ABSTRACT:
A superscalar microprocessor employing a mask decoder circuit is provided. The mask decoder circuit receives an input value indicative of one of a plurality of masks. The mask decoder circuit independently and in parallel processes portions of the input value to produce a submask (containing the portion of the output mask in which a transition from binary zeros to binary ones occurs) and to select either the submask, binary zeros, or binary ones for each of a plurality of regions within an output mask. The region receiving the submask is identified by the portion of the input value not processed to produce the submask. Other regions are filled with either binary zeros or binary ones according to the desired output mask.

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