System and method for peripheral data transfer

Details System and method for peripheral data transfer System and method for peripheral data transfer

1992-12-18

1995-10-24

Powell, Mark R.

H04J 302, G06F 1338

Patent

active

054617014

ABSTRACT:
A system and method for increasing the rate of data transfer from a host computer to a peripheral without the need for special hardware within the host computer or a special interface cable coupling the host computer to the peripheral. Some simple hardware modifications are required within the peripheral interface. Data is transferred from the host computer to the peripheral in 4 KByte bursts. Handshaking occurs between the host computer and the peripheral only between bursts. Each byte of peripheral data is apportioned into two nibbles within the host computer. Two bytes are transmitted from the host computer to the peripheral, each transmitted byte containing two data clocks, a panty bit, and a nibble of peripheral data. Within the peripheral, a clock circuit receives the two clock signals from each transmitted byte and generates delayed signals to latch the nibbles of peripheral data into storage registers. The latching signals are generated only after the logic transition of both clock signals. The storage registers are used to reform the original byte of peripheral data from the two nibbles. In addition, one of the transmitted bytes contains a flag to signal the peripheral that the data that follows is out-of-band data. This allows the host computer to address registers within the peripheral. Data compression may also be implemented to increase the speed of data transfer. Out-of-band data can include a data number indicating the number of times that a particular byte of peripheral data should be repeated. The system can be easily implemented on any Centronics compatible printer system to increase the rate of data transfer.

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