Microprocessor with multiple bus configurations

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G06F 1340

Patent

active

057817464

ABSTRACT:
A microprocessor includes a processor unit with an internal bus and a programmable bus control unit with an external bus. The bus control unit interconnects the internal bus with the external bus through multiplexers, latches and control logic. An 8 and 16-bit multiplexed bus mode and an 8 and 16-bit non-multiplexed bus mode are programmable. The bus control unit generates all of the necessary control signals adjusting their timing to the respective bus type. Different bus configurations can be selected for several address ranges through different control registers. The timing of the bus signals is programmable to allow slower peripherals to be connected to the microprocessor.

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Computer Design Publ. 29(1990) Mar. 1, No. 5, pp. 24, 26, "Multibus I stretches to 32 bits".
Siemens Components Publ. XXII (1987)Oct., No. 5, pp. 178 and 179.

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