Hybrid chip-set architecture for artificial neural network syste

Details Hybrid chip-set architecture for artificial neural network syste Hybrid chip-set architecture for artificial neural network syste

1995-06-07

1998-07-14

Hafiz, Tariq R.

395 11, 395 21, G06F 1518

Patent

active

057817022

ABSTRACT:
A self-contained chip set architecture for ANN systems, based on back-propagation model with full-connectivity topology, and on-chip learning and refreshing, based on analog chip set technology providing self-contained synapse and neuron modules with fault tolerant neural computing, capable of growing to any arbitrary size as a result of embedded electronic addressing. Direct analog and digital I/O ports allow real-time computation and interface communication with other systems including digital host of any bus bandwidth. Scalability is provided, allowing accommodation of all input/output data sizes and different host platform.

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