Register arithmetic device

Details Register arithmetic device Register arithmetic device

1981-07-20

1984-07-31

Shaw, Gareth D.

Boots, shoes, and leggings

364736, G06F 748

Patent

active

044634412

ABSTRACT:
An arithmetic device having successive arithmetic registers connected in cascade, with buffer registers at each end of the cascade. An information exchange circuit bidirectionally connected to all the arithmetic registers for controlling information transfer therebetween such that the first register is connected to all of the other registers and every other register is also connected to a preceding and a succeeding register.

REFERENCES:
patent: 3391390 (1968-07-01), Crane et al.
patent: 3787673 (1974-01-01), Watson et al.
patent: 4025771 (1977-05-01), Lynch et al.
patent: 4159520 (1979-06-01), Prioste
patent: 4206503 (1980-06-01), Woods et al.
patent: 4224676 (1980-09-01), Appelt
Alexandridis, Bit-Slice Microprocessor Architecture, Jun. 1978, "Computer".

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