Sum and carry outputs with shared subfunctions

Details Sum and carry outputs with shared subfunctions Sum and carry outputs with shared subfunctions

1982-05-17

1984-07-31

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

044634390

ABSTRACT:
Full adder stages in this adder are made up of two half adder stages that will produce either the true or complement of the sum as a bundle of subfunction signals that can be shared between the sum and carry outputs of the full adder stage. The half adder stages come in a variety of forms to accommodate both true, both complement or one true and one complement input combinations to the stage.

REFERENCES:
patent: 2899133 (1959-08-01), Tryon
patent: 3548182 (1970-12-01), Pross
patent: 3646332 (1972-02-01), Suzuki
patent: 4369500 (1983-01-01), Fette

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