Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Patent
1996-04-05
1998-04-07
Picard, Leo P.
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
361760, 361767, 361772, 361777, 361779, 361807, 361809, 361813, 257787, 257687, 257692, 257697, 257778, 257782, 257783, 257784, 174 521, 174 522, 174259, 174260, 174251, 174255, H05K 0702
Patent
active
057371911
ABSTRACT:
A semiconductor chip mount structure includes a substrate having a base surface on which base side connectors are formed; a semiconductor chip mounted on the base surface, the semiconductor chip having chip side connectors on a first surface thereof facing the base surface, the chip side connectors being electrically connected to the base side connectors; an insulating resin layer covering the chip side connectors and the base side connectors; a metal layer, made of a metal having a melting point lower than a temperature at which the electrical components of the semiconductor chip may be thermally destroyed, for covering the semiconductor chip and the insulating resin layer; and a wetting characteristic improving layer such as a metal powder or foil layer, formed along a contact surface between the metal layer and the insulation resin layer.
REFERENCES:
patent: 4254432 (1981-03-01), Babuka et al.
patent: 4323914 (1982-04-01), Berndlmaier et al.
patent: 5107325 (1992-04-01), Nakayosi
Patent Abstracts of Japan, vol. 13, No. 333 (E-794), 26 Jul. 1989 & JP-A-01-096952 (Hitachi Ltd), 14 Apr. 1989.
Patent Abstracts of Japan, vol. 15, No. 62 (E-1033), 14 Feb. 1991 & JP-A-02-288255 (Hitachi Ltd), 28 Nov. 1990.
Patent Abstracts of Japan, vol. 16, No. 381 (E-1248), 14 Aug. 1992 & JP-A-04-122053 (Fujitsu Ltd), 22 Apr. 1992.
Patent Abstracts of Japan, vol. 17, No. 415 (E-1407), 3 Aug. 1993 & JP-A-05-082584 (NEC Corp), 2 Apr. 1993.
Patent Abstracts of Japan, vol. 18, No. 299 (E-1558), 8 Jun. 1994 & JP-A-06-061383 (Fujitsu Ltd), 4 Mar. 1994.
Harayama Yoichi
Horiuchi Michio
Foster David
Picard Leo P.
Shinko Electric Industries Co. Ltd.
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