Circuit for causing FPLL to lock in desired phase

Demodulators – Frequency modulation demodulator – Input signal combined with local oscillator or carrier...

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331 11, 331 14, 331 23, 331DIG2, 455208, 455260, H03D 300, H03L 7087, H03L 7095

Patent

active

057810656

ABSTRACT:
A biphase stable FPLL includes a lock switch, operated in response to a frequency lock condition, that forces a predetermined voltage on the input of the third multiplier to guarantee that the loop locks up in a phase that produces a desired polarity of demodulated signal. A frequency lock indicator operates the lock switch to force the predetermined voltage on the third multiplier irrespective of the actual lock up phase of the loop. If the lock up phase is wrong, the voltage reversal causes the VCO to slip 180.degree. in phase and the loop locks up in its other bistable state.

REFERENCES:
patent: 5260671 (1993-11-01), Iso et al.
patent: 5359661 (1994-10-01), Manloue et al.
patent: 5436598 (1995-07-01), Harris
patent: 5539357 (1996-07-01), Rumreich

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