Method of making fully self-aligned bipolar transistor involving

Fishing – trapping – and vermin destroying

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437203, 437 33, 437193, 437233, 437162, H01L 2144

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047450878

ABSTRACT:
An improved method of making a bipolar transistor is disclosed which comprises forming one or more mask layers over a silicon substrate, etching at least one of said one or more masking layers to define a base contact area and a spaced apart collector contact area with an unetched emitter contact area defined in-between, forming a collector slot in a substrate of an integrated circuit structure through the collector contact area defined in the one or more mask layers, oxidizing the sidewall of the collector slot, filling the collector slot and the base and collector contact regions with polysilicon, removing one or more of the mask layers between the polysilicon base and collector contacts, oxidizing the exposed sidewalls of the polysilicon base and collector contacts, forming an emitter contact region between said collector and base contact regions insulated from the base and collector contacts by the sidewall oxidation thereon, and forming a base region in said substrate spaced from the collector slot by the oxide formed on the sidewall of the collector slot.

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K. Minegishi et al, "A Sub-Micron CMOS Megabit Level Dynamic RAM Technology Using a Doped Face Trench Capacitor Cell", Proceedings, IEDM, 1983, p. 319.
T. Morie et al, "Depletion Trench Capacitor Technology for Megabit Level MOSdRAM", IEEE Electron Device Letters, vol. EDL-4, No. 11, Nov., 1983, p. 411.
Tak H. Ning et al, "Self-Aligned Bipolar Transistors for High-Performance and Low-Power-Delay VLSI", IEEE Transactions on Electron Devices, vol. ED-28, No. 9, Sep., 1981, pp. 1010-1013.
M. Vora et al, "A Sub-100 Picosecond Bipolar ECL Technology", IEDM, 1985, pp. 34-37.

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