Patent
1996-07-26
1999-05-04
Lall, Parshotam S.
395394, G06F 938
Patent
active
059013028
ABSTRACT:
A microprocessor employing a reorder buffer is configured with fixed, symmetrical issue positions. The symmetrical nature of the issue positions may increase the average number of instructions to be concurrently dispatched and executed by the microprocessor. In one embodiment, the reorder buffer allocates a line of storage sufficient to store instruction results corresponding to a maximum number of concurrently dispatchable instructions regardless of the number actually dispatched. The average number of unused locations within the line decreases as the average number of concurrently dispatched instructions increases.
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Tran Thang M.
Witt David B.
Advanced Micro Devices , Inc.
Kivlin B. Noel
Lall Parshotam S.
Merkel Lawrence J.
Vu Viet
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