Pulse or digital communications – Synchronizers – Self-synchronizing signal
Patent
1995-12-08
1999-05-04
Vo, Don N.
Pulse or digital communications
Synchronizers
Self-synchronizing signal
375361, 375376, 327 12, 327159, 327161, H04L 7033
Patent
active
059011882
ABSTRACT:
A method of phase synchronization of a bit rate clock signal generated on a receiver side with a biphase-modulated digital RDS signal that is demodulated on the receiver side with both signals having the same bit rate. The bits of both the RDS signal and the bit rate clock signal are each composed of two half bits having different digital potential values. The first or the second RDS half bit has a high digital value and the other RDS half bit has a low digital value based on which one of two logic values "1" and "0" is represented by the respective RDS bit. At a first time coinciding with the time of a rising and/or falling edge of a bit of the RDS signal, the digital value of the bit rate clock signal is measured as a first sample value, and at a second time shifted from the first time by a delay time that is shorter than a half bit duration, the digital value of the bit rate clock signal is measured as a second sample value. The phase position of the bit rate clock signal is shifted by a positive or a negative phase angle of a phase angle amount based on whether the two sample values each have a different or an identical digital value.
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Carlson David V.
Le Amanda T.
Mates Robert
SGS-Thomson Microelectronics GmbH
Vo Don N.
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