Semiconductor memory device selection method and circuit for emb

Details Semiconductor memory device selection method and circuit for emb Semiconductor memory device selection method and circuit for emb

1998-02-03

1999-05-04

Nguyen, Tan T.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523002, 365195, 36518902, 36518511, G11C 700

Patent

active

059011076

ABSTRACT:
Only a first EEPROM 2 can output data according to an output signal of a selector circuit 5 when a "High" logical value signal and a "Low" logical value signal are output from first and second input/output terminals of a CPU 1 respectively. Conversely, only a second EEPROM 3 can output data according to the output signal of the selector circuit 5 when the "Low" logical value signal and the "High" logical value signal are output from the first and second input/output terminals respectively. The selector circuit 5 causes all the EEPROMs 2, 3 to turn into their inoperative states when the "High" logical value signals or the "Low" logical value signals are output from both the first and second input/output terminals respectively.

REFERENCES:
patent: 4897818 (1990-01-01), Redwine et al.
patent: 5426753 (1995-06-01), Moon
patent: 5530836 (1996-06-01), Busch et al.
patent: 5771199 (1998-06-01), Lee

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