Method for forming buried contact complementary MOS devices

Details Method for forming buried contact complementary MOS devices Method for forming buried contact complementary MOS devices

1980-01-21

1981-07-07

Rutledge, L. Dewayne

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29590, 148 15, 148175, 148187, 156657, 1566591, 156662, 357 4, 357 23, 357 42, 357 49, 427 88, 427 91, 4271261, H01L 2186, H01L 2188

Patent

active

042766885

ABSTRACT:
A method for fabricating a complementary MOS device, applicable to either silicon-on-sapphire or bulk silicon, is described wherein a buried contact is formed that is comprised of a region of doped silicon, a layer of MoSi.sub.2, a thin layer of Mo and a layer of doped polycrystalline silicon.

REFERENCES:
patent: 3753774 (1973-08-01), Veloric
patent: 3958266 (1976-05-01), Athanas
patent: 3990056 (1976-11-01), Luisi et al.
patent: 4057824 (1977-11-01), Woods
patent: 4102733 (1978-07-01), De La Moneda
patent: 4109372 (1978-08-01), Geffken
patent: 4125854 (1978-11-01), McKenny et al.
patent: 4151631 (1979-05-01), Klein
patent: 4169746 (1979-10-01), Ipri et al.
Rideout, V. L., "Reducing Sheet Resistance . . . Integrated Circuits", I.B.M. Tech. Discl. Bull., vol. 17, No. 6, Nov. 1974, pp. 1831-1833.

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