Semiconductor memory device having stacked capacitor

Details Semiconductor memory device having stacked capacitor Semiconductor memory device having stacked capacitor

1991-08-07

1992-06-30

Hille, Rolf

357 51, 357 71, H01L 2968, H01L 2702, H01L 2348

Patent

active

051268108

ABSTRACT:
A semiconductor memory device includes a substrate, a transfer transistor formed on the substrate and including drain and source regions, and a charge storage capacitor electrically coupled to one of the drain and source regions of the transfer transistor. The charge storage capacitor has a conductive base layer which is electrically coupled to the one of the drain and source regions of the transfer transistor, at least one conductive side wall connected to one end of the base layer, a plurality of fin-shaped parts which extend from the side wall in a plurality of levels generally parallel to the base layer, a dielectric layer which covers exposed surfaces of the base layer, the side wall and the fin-shaped parts, and a conductor layer which is formed on the dielectric layer to form an opposed electrode of the charge storage capacitor. The fin-shaped parts and the side wall form a storage electrode of the charge storage capacitor.

REFERENCES:
patent: 4700457 (1987-10-01), Matsukawa
patent: 4827323 (1989-05-01), Tigelaar et al.

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