Electronic circuit or board tester with compressed data-sequence

Details Electronic circuit or board tester with compressed data-sequence Electronic circuit or board tester with compressed data-sequence

1997-03-04

1999-05-04

Barlow, John

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

371 275, 371 221, 371 211, G01R 313183

Patent

active

058999612

ABSTRACT:
This invention relates to electronic circuit testing and more particularly to an apparatus utilizing data compression techniques. An electronic circuit or board tester according to the invention includes one tester circuit with the combination of a sequencer and a vector-sequencer-memory per pin. A data-sequence, such as a loop to address the memory cells of an electronic memory one after the other in a predetermined chronological order, is applied to a pin of a device under test and is compressed in order to save memory space.

REFERENCES:
patent: 4656632 (1987-04-01), Jackson
patent: 5499248 (1996-03-01), Behrens et al.
patent: 5579493 (1996-11-01), Kiuchi et al.
patent: 5696772 (1997-12-01), Lesmeister

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