Method for fabrication a semiconductor device

Fishing – trapping – and vermin destroying

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437 57, H01L 218238

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active

055344500

ABSTRACT:
There is disclosed a semiconductor device remarkably reduced in the area of the element isolation region and in the area of the substrate electrode, thereby contributing to high integration, which comprises a P type semiconductor substrate containing an N well and a P well and a trench element isolation film therein, the trench element isolation film being between the N well and P well, a P-MOSFET and an N-MOSFET established in each N well and P well, respectively, and an N type substrate electrode which is formed in contact with the source electrode of the P-MOSFET and is applied by V.sub.DD voltage.

REFERENCES:
patent: 4593459 (1986-06-01), Poppert et al.
patent: 4808548 (1989-02-01), Thomas et al.
patent: 4927777 (1990-05-01), Hsu et al.
patent: 5015594 (1991-05-01), Chu et al.
patent: 5356822 (1994-10-01), Lin et al.

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