Coded data generation or conversion – Converter compensation
Patent
1996-09-18
1998-06-30
Young, Brian K.
Coded data generation or conversion
Converter compensation
341139, 341152, 341154, H03H 106, H03H 182, H03H 178
Patent
active
057740836
ABSTRACT:
A digital to analogue converter having a plurality of output stages 46. Each output stage 46 includes a tri-state buffer 54 that outputs an on-signal, an off-signal or a pulse width modulated signal PWM that is selected by a multiplexer 52 that operates under control of a chord decoder 50 that is responsive to exponent bits within the input digital signal value. If a pulse width modulated signal is selected, then its duty cycle is controlled by a pulse width modulated decoder 48 that is responsive to mantissa bits within the input digital signal value. A further output provides a pulse width modulated signal of a predetermined duty cycle that may be used as a reference signal to compensate for variations in the operation of the rest of the digital to analogue circuit.
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Advanced Risc Machines Limited
Huynh Kim
Young Brian K.
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