Increasing data transfer efficiency for a read operation in a no

Details Increasing data transfer efficiency for a read operation in a no Increasing data transfer efficiency for a read operation in a no

1996-05-15

1998-05-19

Harvey, Jack B.

395308, G06F 1300

Patent

active

057548021

ABSTRACT:
A method and apparatus for increasing data transfer efficiency for a read operation in a non-split transaction bus environment by substituting a write operation for the read operation. The data transfer efficiency is increased and deadlocking is reduced by substituting two write operations (one from an I/O device to a bus controller and the other from the bus controller to the I/O device) for one read operation. Further, the present invention improves the efficiency of data transfer by maintaining the compatibility of a bus specification when DMA of an I/O bus having no split transfer function, such as a PCI bus or inter-I/O transfer, is executed. A processor instructs a data transfer operation to an I/O device or bus conversion adapter. The I/O device or bus conversion adapter connected to a bus outputs a write access, and a bus connection controller connected to the bus receives the write access and reads data in a main memory. The bus connection controller then transfers read data to the I/O device or the bus conversion adapter. Such an operation may also be performed between two I/O devices or bus conversion adapters.

REFERENCES:
patent: 3997896 (1976-12-01), Cassarino, Jr. et al.
patent: 5191649 (1993-03-01), Cadambi et al.
patent: 5353415 (1994-10-01), Wolford et al.
patent: 5533204 (1996-07-01), Tipley
patent: 5535340 (1996-07-01), Bell et al.
patent: 5544331 (1996-08-01), Kolb
Nikkei Electronics 1994.6.6 (No. 609) pp. 67-97.

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