Fishing – trapping – and vermin destroying
Patent
1990-01-16
1992-01-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 48, 437 52, 437192, 437200, H01L 2170
Patent
active
050844180
ABSTRACT:
Bitlines (34) are formed by creating a diffused region (26) around the sidewalls and bottom of a trench (20). The trench (20) is filled with a conductive region (30), typically a refractory metal, refractory metal silicide.
REFERENCES:
patent: 4191603 (1980-03-01), Garbarino et al.
patent: 4343676 (1982-08-01), Tarng
patent: 4503598 (1985-03-01), Vora et al.
patent: 4520552 (1985-06-01), Arnould et al.
patent: 4554728 (1985-11-01), Shepard
patent: 4562640 (1986-01-01), Widmann et al.
patent: 4569701 (1986-02-01), Oh
patent: 4598461 (1986-07-01), Love
patent: 4604150 (1986-08-01), Lin
patent: 4914050 (1990-03-01), Shibat
Ghate, "Interconnections in VLSI", Physics Today, Oct. 1986, pp. 58-66.
Esquivel Agerico L.
Mitchell Allan T.
Tigelaar Howard L.
Donaldson Richard L.
Hearn Brian E.
Hiller William E.
Sorensen Douglas A.
Texas Instruments Incorporated
LandOfFree
Method of making an array device with buried interconnects does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making an array device with buried interconnects, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making an array device with buried interconnects will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1860968