Process to fabricate a double ring stacked cell structure

Details Process to fabricate a double ring stacked cell structure Process to fabricate a double ring stacked cell structure

1991-06-07

1992-01-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, 437228, 437233, 437919, 357 236, H01L 2170

Patent

active

050844059

ABSTRACT:
An existing stacked capacitor fabrication process is modified to construct a three-dimensional stacked capacitor, referred to as a Double Ring Stacked Cell or DRSC. The DRSC design defines a capacitor storage cell that in the present invention is used in a DRAM process. The DRSC is made up of a polysilicon storage node structure having circular polysilicon ringed upper portion centered about a lower portion that makes contact to an active area via a buried contact. The polysilicon storage node structure is overlaid by polysilicon with a dielectric sandwiched in between to form a completed DRSC capacitor. The novel 3-dimensional shaped polysilicon storage node plate having double polysilicon rings, allows substantial capacitor plate surface area of 200% or more to be gained at the storage node over that of a conventional STC.

REFERENCES:
patent: 4742018 (1988-05-01), Kimura et al.
"A Stacked Capacitor Cell with Ring Structure", Shinmura et al., Ext. Abs. of the 22nd Int. Conf. on Solid State Device and Materials, 1990, pp. 833-836.
"Novel Stacked Capacitor Cell for 64Mb Dram", Wakamiya et al., pp. 69-70, Symp. on ULSI Tech., 1989.
"Crown-Shaped Stacked-Capacitor Cell for 1.5 V Operation 64 Mb DRAM's", IEEE Tran. Elec. Dev., pp. 255-261, 1991.

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