Write reduction in flash memory systems through ECC usage

Details Write reduction in flash memory systems through ECC usage Write reduction in flash memory systems through ECC usage

1996-10-15

1998-05-19

Baker, Stephen M.

Excavating

36518509, 371 511, 39518507, 711103, G06F 1110, G06F 1200, G11C 2900

Patent

active

057545677

ABSTRACT:
A nonvolatile memory system emulates a magnetic hard disk drive and includes an array of nonvolatile memory cells, such as flash memory cells, organized into sets, such as sectors. A buffer, such as a random access memory, stores a first set of data to be written to the array. Error correction code (ECC) circuitry receives the first set of data and calculates first ECC check bits representative of the first set of data. ECC comparison circuitry compares the first ECC check bits with second ECC check bits representative of a second set of data stored in the array to generate an ECC comparison signal having a first state indicative of a match between the first and second ECC check bits and a second state indicative of a miscomparison between the first and second ECC check bits.

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