Non-volatile semiconductor memory device capable of pre-conditio

Details Non-volatile semiconductor memory device capable of pre-conditio Non-volatile semiconductor memory device capable of pre-conditio

1999-01-19

2000-06-20

Tran, Andrew Q.

Static information storage and retrieval

Floating gate

Particular biasing

36518509, 36518522, 36518523, 365236, 36518907, 3652257, G11C 1606

Patent

active

06078525&

ABSTRACT:
In a non-volatile semiconductor memory device, a binary counter is connected to a most significant bit portion of an address counter for successively generating addresses of rows of a memory cell array. The binary counter forcibly selects one of spare row lines, and permits a pre-program operation (program operation prior to data erasure) to be performed on memory cells connected to the selected one of spare row lines, when the pre-program operation has completely been performed on the memory cells of the rows of the memory cell array. In the pre-program operation, whether or not to verify data is determined on the basis of a coincidence signal outputted from a defective row address storing section.

REFERENCES:
patent: 5754558 (1998-05-01), Hayakawa et al.
patent: 5835413 (1998-11-01), Hurter et al.

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