Semiconductor memory device having a plurality of wiring layers

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257760, 257296, 257306, 438253, 438396, 438622, 438625, H01L 2352, H01L 2940, H01L 2348

Patent

active

060781068

ABSTRACT:
A semiconductor memory device, which has metal wirings on interlayer insulating films having a step on a border portion between a memory cell array region and a peripheral circuit region, and which can prevent a short-circuit between adjacent metal wirings to allow a cell area thereof to be reduced, is provided. No metal wiring is provided on a first interlayer insulating film formed on the border portion and having a large step. Connecting wirings are provided on a second interlayer insulating film formed on the border portion and having a small step to connect metal wirings of a first metal wiring layer.

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patent: 5689126 (1997-11-01), Takaishi
patent: 5811849 (1998-09-01), Matsuura
patent: 5907788 (1999-05-01), Kasai
patent: 5990507 (1999-11-01), Mochizuki et al.

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