Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1997-01-22
2000-06-20
Chaudhuri, Olik
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438111, 438112, 438123, 438124, 438127, 257673, 257676, 257690, 257766, 257781, 257787, H01L 2144
Patent
active
060777273
ABSTRACT:
There is provided a method for manufacturing a lead frame which can easily manufacture a high quality lead frame.
A pattern layer is selectively formed on a copper plate and the surface of the substrate having formed this pattern layer is then plated with gold to form a gold layer using the pattern layer as the mask. Next, the gold layer is then plated with copper to form a copper layer, thereby forming a fine lead consisting of two layers of gold layer and copper layer. Thereafter, the pattern layer is selectively removed, an insulated resist film is formed and the copper plate is etched. In this case, the gold layer is used as the etching stop layer. Thereby, the lead frame having the fine lead of double-layer structure can be formed.
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Ito Makoto
Osawa Kenji
Chambliss Alonzo
Chaudhuri Olik
Kananen Ronald P.
Sony Corporation
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