Apparatus for reading to and writing from memory streams of data

Details Apparatus for reading to and writing from memory streams of data Apparatus for reading to and writing from memory streams of data

1987-06-01

1989-04-04

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 938

Patent

active

048191558

ABSTRACT:
A pair of arithmetic logic units for receiving instruction to perform data transformations are positioned in tandem relation between an input bus and an output bus which are both connected to a register file. Data paths connect the register file to the input and output buses for transferring data from the register file to the arithmetic logic units. One arithmetic logic unit has a pair of input ports connected to the input bus and an output port connected to the input of the second arithmetic logic unit. The second arithmetic logic unit has a second input port connected to the input bus and an output port connected to the output bus. The tandem arrangement of arithmetic logic units are pipelined to operate concurrently to provide twice the data transformation capability of a single arithmetic logic unit in a data processor. With this arrangement streams of data are concurrently transformed by the tandem arrangement of arithmetic logic units to perform vector operations. With this arrangement control flow calculations are concurrently executed separately thus allowing the arithmetic logic units to compute data transformations at every moment. As a result procedure call parameters do not consume the general-purpose register since they are stored in a data value queue not saved or stored across procedure boundaries.

REFERENCES:
patent: 4297743 (1981-10-01), Appell et al.
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4439827 (1984-03-01), Wilkes
patent: 4574348 (1986-03-01), Scallon
patent: 4719570 (1988-01-01), Kawabe

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