Circuit for rapidly resynchronizing a clock

Oscillators – Relaxation oscillators

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Details

331 1A, 328134, 328155, 307269, 307528, H03K 526, H03L 706

Patent

active

043096620

ABSTRACT:
A circuit for rapidly resynchronizing a clock with an external clock is disclosed. The clock to be synchronized is obtained at the output of a phase-locked loop by dividing the frequency of a reference clock in a frequency divider whose division factor is controlled by a phase controller which detects the deviation between the transitions of the two clocks to be synchronized. According to the invention, the pulses of the reference clock are applied to the phase-locked loop by means of a gate, with this gate being rendered nonconductive by means of the characteristic transition of the clock to be synchronized which follows the appearance of a resynchronizing control signal, and thereafter this gate is rendered conductive by means of a characteristic transition of the external clock.

REFERENCES:
patent: 2980858 (1961-04-01), Grondin et al.
patent: 3781696 (1973-12-01), Van Loon et al.
patent: 3931585 (1976-01-01), Barker et al.
patent: 3956710 (1976-05-01), Seitz et al.
patent: 4131856 (1978-12-01), Chapman

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