MOS Transistor decoder circuit

Details MOS Transistor decoder circuit MOS Transistor decoder circuit

1979-08-23

1982-01-05

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307463, H03K 19094, H03K 1920

Patent

active

043096298

ABSTRACT:
An MOS transistor decoder circuit including a plurality of MOS transistors and at least one load element, comprises at least one additional MOS transistor connected to the plurality of MOS transistors and the load element for selecting either of two output terminals for the plurality of MOS transistors, through which decoded output signals are developed. Preferably, four additional MOS transistor are provided at least two of which are connected to either of the two output terminals. The two additional MOS transistors connected to anyone of the two output terminals have normal and complement bit signals, respectively.

REFERENCES:
patent: 3665473 (1972-05-01), Heimbigner
patent: 3778784 (1973-12-01), Karp et al.
patent: 3806880 (1974-04-01), Spence
patent: 3868657 (1975-02-01), Hoffman et al.
patent: 3906463 (1975-09-01), Yu
patent: 3909808 (1975-09-01), Cochran et al.
patent: 3962686 (1976-06-01), Matsue et al.
patent: 4024512 (1977-05-01), Amelio
patent: 4094012 (1978-06-01), Perlegos et al.
Parikh, "High-Speed FET Decoder"; IBM Tech. Discl. Bull.; vol. 18, No. 12, pp. 3955-3956; 5/76.

Affiliated with

Also associated with

Rating

MOS Transistor decoder circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS Transistor decoder circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS Transistor decoder circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1846166