Wireable planar integrated circuit chip structure

Details Wireable planar integrated circuit chip structure Wireable planar integrated circuit chip structure

1976-01-06

1976-12-21

Wojciechowicz, Edward J.

357 68, 357 41, 357 48, H01L 2710, H01L 2702, H01L 2704, H01L 2348

Patent

active

039992144

ABSTRACT:
A planar semiconductor integrated circuit chip structure comprising a surface from which a plurality of regions of different conductivity types extend into the chip to provide the transistors and resistors wherein said transistors and resistors are arranged in a plurality of repetitive cells, each of said cells containing a sufficient number of transistors and resistors to form a selected type of logic circuit. The cells are arranged in an orthogonal array with the cells in substantially parallel rows in both orthogonal directions. The structure includes a level of metallization disposed above and insulated from the array by at least one layer of electrically insulative material. This level of metallization comprises a plurality of groups of substantially parallel lines respectively disposed above and running parallel to a corresponding plurality of interfaces between rows of said cells in one of the orthogonal directions. Each group of lines is connected to a plurality of cells abutting the interface below the group to provide interconnections between and voltage level supplies to said cells. In addition, this level of metallization includes a plurality of line patterns respectively disposed spaced from and between said groups and above the cells to provide intracell connections. With this arrangement, it is possible to have at one metallization level, the metallization lines required for the intracell connections and still provide channels spaced from the intracell connections wherein intercell metallization may be formed.

REFERENCES:
patent: 3760384 (1973-09-01), Krolikowsky et al.
patent: 3808475 (1974-04-01), Buelow et al.

Affiliated with

Also associated with

Rating

Wireable planar integrated circuit chip structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wireable planar integrated circuit chip structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wireable planar integrated circuit chip structure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1842795