Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-12-22
2000-05-23
Nelms, David
Static information storage and retrieval
Addressing
Sync/clocking
365194, G11C 800
Patent
active
060672722
ABSTRACT:
A clock applying circuit for a synchronous memory is comprised of a clock input for receiving a clock input signal, apparatus connected to the synchronous memory for receiving a driving clock signal, and a tapped delay line for receiving the clock input signal and for delivering the clock driving signal to the synchronous memory in synchronism with but delayed from the clock input signal, the delay being a small fraction of the clock period of the clock input signal.
REFERENCES:
patent: 4754164 (1988-06-01), Flora
patent: 5287319 (1994-02-01), Fukumoto
patent: 5311483 (1994-05-01), Takasugi
patent: 5544203 (1996-08-01), Casasanta et al.
patent: 5604775 (1997-02-01), Saitoh et al.
Allan Graham
Foss Richard C.
Gillingham Peter B.
Mosaid Technologies Incorporated
Nelms David
Tran M.
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