Microprocessor executing multiple register transfer operations w

Details Microprocessor executing multiple register transfer operations w Microprocessor executing multiple register transfer operations w

1995-02-07

1997-11-04

Lall, Parshotam S.

395310, G06F 9315

Patent

active

056849834

ABSTRACT:
A microprocessor includes a register file that outputs data from multiple registers at one time, and that stores separate data to multiple registers at one time, and an instruction decoder for decoding an instruction to output an operation control signal. The instruction decoder decodes a specific data transfer instruction and outputs a multiple transfer control signal indicating data transfer from multiple registers to multiple registers, a source designating signal for designating multiple source registers, and a destination designating signal for designating destination registers. The register file responds to the source designating signal and outputs data from corresponding registers. The microprocessor further includes an ALU responsive to the control signal for carrying out an operation according to data stored in the register file to provide the result to a register in the register file. The ALU responds to the multiple transfer control signal and provides data read out from the source registers specified according to the source designating signal to the register file. The register file stores data provided from the ALU to the destination registers specified according to the respective destination designating signals. The instruction decoder provides the multiple transfer control signal, and the source and destination designating signals, whereby the ALU directly transfers data in the source registers specified according to the source designating signals to the destination registers specified according to the destination designating signals. Therefore, the transfer operation of a plurality of data can be executed at the same time.

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"Pathlength Reduction Features in the PA-RISC Architecture", by Ruby Lee et al., IEEE, Feb. 1992.

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