Pipelined microprocessor including a high speed single-clock lat

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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327199, 327285, 327401, H03H 1126

Patent

active

056844220

ABSTRACT:
A pipelined microprocessor is provided including a latch circuit wherein a first transmission gate is electrically coupled in series with a second transmission gate between an output line of a first pipeline stage and an input stage of a subsequent pipeline stage. The latch circuit is controlled by a single clock signal wherein a delay element is employed to simultaneously enable both transmission gates upon an edge of the clock signal. The length of time during which both transmission gates are enabled is determined by an electrical delay associated with the delay element. When both transmission gates are enabled, the input line is electrically coupled to the output line. A keeper circuit at the output of the second transmission gate retains a logical value at the output of the latch after the input line is decoupled from the output line. In one implementation, the delay element is implemented with a set of serially coupled inverters, and the length of the time delay controls the time window during which both transmission gates are enabled.

REFERENCES:
patent: 3812384 (1974-05-01), Skorup
patent: 4495629 (1985-01-01), Zasio et al.
patent: 4831286 (1989-05-01), Garcia et al.
patent: 4933575 (1990-06-01), Aso
patent: 5015875 (1991-05-01), Giles et al.
patent: 5105100 (1992-04-01), Yamada
patent: 5124572 (1992-06-01), Mason et al.
patent: 5140179 (1992-08-01), Takano
patent: 5212411 (1993-05-01), Asazawa
patent: 5227674 (1993-07-01), Takahashi et al.
patent: 5239206 (1993-08-01), Yanai
patent: 5264738 (1993-11-01), Veendrick et al.
patent: 5280203 (1994-01-01), Hung et al.
patent: 5317205 (1994-05-01), Sato
patent: 5357144 (1994-10-01), Tanaka
patent: 5459421 (1995-10-01), Shaw
patent: 5471158 (1995-11-01), Mehta
G.A. Maley and D.W. Westcott, "IBM Technical Disclosure Bulletin," vol. 25 No. 9, Feb. 1983, 2 pages.
Frank Gonzalez, Design Ideas, "Spare inverters form a transparent D latch," 2119 EDN-Electrical Design News, Apr. 28, 1988, No. 9, 1 page.

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