Wafer structure in a semiconductor device manufacturing process

Details Wafer structure in a semiconductor device manufacturing process Wafer structure in a semiconductor device manufacturing process

1995-12-13

1997-11-04

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

257620, 257618, 257622, 437924, 437227, 148DIG102, H01L 23544, H01L 2906, H01L 21302, H01F 103

Patent

active

056843330

ABSTRACT:
Alignment marks used in different processes are arranged on scribing lines. The scribing lines are used for cutting off individual semiconductor devices formed on a wafer, and the alignment marks have widths which are larger than widths of the scribing lines. The width of areas corresponding to positions where alignment marks are formed are larger so as to accommodate the alignment marks within the areas. A part of the area of a used alignment mark is covered with a new film so that the area is permitted to have a scribing line having a desired width every time a used alignment is generated. A new alignment mark is arranged within other areas where an alignment mark is not formed. In such an arrangement of the alignment marks, the center line of the scribing line is made clear, and the area where the semiconductor devices are formed can be made large.

REFERENCES:
patent: 3620932 (1971-11-01), Crishal
patent: 5089427 (1992-02-01), Schenberg

Affiliated with

Also associated with

Rating

Wafer structure in a semiconductor device manufacturing process does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer structure in a semiconductor device manufacturing process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer structure in a semiconductor device manufacturing process will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1835372