Parallel adder

Details Parallel adder Parallel adder

1991-04-19

1992-07-07

Mai, Tan V.

Boots, shoes, and leggings

364784, G06F 750

Patent

active

051288923

ABSTRACT:
A parallel adder has a carry between adjacent adding stages. Each of the adding stages includes a carry-generating circuit which generates a carry output signal from carry input signals to be added by the adding stage and a carry input signal applied to it. The carry-generating circuit includes a complementary stage which is built with complementary transistors connected between the two terminals of a supply-voltage source. The carry-generating circuit has a center node which is connected to the carry output terminal and which, if the data input signals applied to the adding stage have the same binary state value, is at a potential corresponding to the binary state value. The carry-generating cricuit further includes a coupling circuit. One end of the coupling circuit is connected to one terminal of the supply-voltage source, and the other end of the coupling circuit is at the potential of the one terminal if the data input signals have unequal binary state values. The carry-generating circuit further includes a switching transistor whose main path is connected between the center node and the other end of the coupling circuit. The control electrode of the switching transistor is supplied with the carry input signal. Each adding stage further includes a presetting device whereby the adding stage, prior to its respective computing cycle, is placed in a preset state representing no carry output.

REFERENCES:
patent: 4471454 (1984-09-01), Dearden et al.
patent: 4885716 (1989-12-01), Little
patent: 4905179 (1990-02-01), Licciardi et al.
patent: 4910700 (1990-03-01), Hartley et al.
patent: 5010509 (1991-04-01), Cox et al.
R. A. Allen et al., "Charged Coupled Devices in Digital LSI", IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, Washington, D.C., Dec. 6-8, 1976, pp. 21-26.
Charles M. Lee et al., "Zipper MOS", PROCEEDINGS OF THE IEEE 1986 CUSTOM INTEGRATED CIRCUITS CONFERENCE, Rochester, N.Y., May 12-15, 1986, pp. 236-239.

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