Semiconductor memory device with parallel addressing and data-co

Details Semiconductor memory device with parallel addressing and data-co Semiconductor memory device with parallel addressing and data-co

1984-12-19

1987-06-09

Fleming, Michael R.

Excavating

371 49, 371 13, G06F 1110

Patent

active

046726144

ABSTRACT:
An improved error-correction type semiconductor memory device operates at high speed. The memory is provided with a pair of row address buffers which can operate independently, and when error correcting operation is performed for the data related to the address contents of one of the buffers, the access operation of the data cell array is conducted by the other of the buffers, thereby enabling the memory device to simultaneously carry out parts of the operation of successive read-out operations.

REFERENCES:
patent: 4360917 (1982-11-01), Sindelar
patent: 4453251 (1984-06-01), Osman
patent: 4464755 (1984-08-01), Stewart
patent: 4472805 (1984-09-01), Wacyk
patent: 4528666 (1985-07-01), Cline

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