Patent
1986-02-06
1989-04-04
James, Andrew J.
357 2313, 357 238, 357 13, H01L 2978
Patent
active
048190446
ABSTRACT:
A vertical type MOS transistor and its chip comprise at least one MOS transistor portion consisting of a semiconductor layer having at least a first P-N junction, sandwiched by a source electrode through an insulating layer and a drain electrode, and a Zener diode portion having a second P-N junction formed in parallel with and adjacent to the MOS transistor portion in said semiconductor layer, the conductive level of said second P-N junction of the diode portion being lower than that of the first P-N junction of the transistor portion. With this construction, when a large surge voltage above a predetermined breakdown point of the Zener diode portion is applied to the source and drain electrodes, the Zener diode portion is first rendered conductive and any breakdown of the MOS transistor portion can be prevented.
REFERENCES:
patent: 4345265 (1982-08-01), Blanchard
patent: 4399449 (1983-08-01), Herman et al.
patent: 4484206 (1984-11-01), Moroshima et al.
patent: 4532534 (1985-07-01), Ford et al.
patent: 4608584 (1986-08-01), Mihara
patent: 4631564 (1986-12-01), Neilson et al.
patent: 4686551 (1987-08-01), Mihara
Crane Sara W.
James Andrew J.
Nissan Motor Co,. Ltd.
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