Method of forming a wiring pattern for a semiconductor device

Details Method of forming a wiring pattern for a semiconductor device Method of forming a wiring pattern for a semiconductor device

1990-03-16

1992-07-07

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437190, 437195, 437203, H01L 2144

Patent

active

051282780

ABSTRACT:
A method of forming a conductive pattern for a semiconductor device free from troubles attributable current leakage and having high reliability. Contact holes are formed in an insulating film formed over a semiconductor substrate by selectively etching portions of the insulating film corresponding to the contact holes so that portions of the semiconductor substrate corresponding to the contact holes are etched in recesses. Insulating side walls are formed on the side surface of the contact holes so as to reach the bottom of the recesses, the contact holes are filled up with a conductive substance by a selective CVD process, a conductive film is formed over the entire surface of insulating film so as to be connected to the conductive substance filling up the contact holes, and then portions of the conductive film are removed to form a conductive pattern.

REFERENCES:
patent: 4597164 (1986-07-01), Havemann
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patent: 4963511 (1990-10-01), Smith
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patent: 5010039 (1991-04-01), Ku et al.
patent: 5026658 (1991-06-01), Fuse et al.
K. C. Saraswat, et al., "Selective CVD of Tungsten for VLSI Technology" Processing of 2nd Int'l Symp. VLSI Science & Tech, vol. 84-7, pp. 409-419.

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