Static information storage and retrieval – Addressing – Sync/clocking
Patent
1986-09-02
1989-01-31
Hecker, Stuart N.
Static information storage and retrieval
Addressing
Sync/clocking
365230, 365189, G11C 1140, G11C 700
Patent
active
048021350
ABSTRACT:
A pseudo static RAM is provided which uses a one MOSFET dynamic RAM cell, in which two functions of a page mode and a static column mode are realized by using an address buffer having a function to transmit address signals fed from external terminals as they are and a latch function to latch the address signals fed from the external terminals in synchronism with predetermined control signals fed from the external terminals. The address buffer also has a multiplexer function to selectively incorporate the address signals from the external terminals and the address signals produced in the inside of the RAM so that the address buffer and an internal address signal generating circuit may be controlled by external control terminals to make possible the continuous access by the internal address signals.
REFERENCES:
patent: 4476548 (1984-10-01), Matsumoto et al.
patent: 4562555 (1985-12-01), Ouchi et al.
patent: 4677592 (1987-06-01), Sakurai et al.
patent: 4683555 (1987-08-01), Pinkham
patent: 4685089 (1987-08-01), Patel et al.
patent: 4706219 (1987-11-01), Miyata et al.
Ishihara Masamichi
Shinoda Takashi
Garcia Alfonso
Hecker Stuart N.
Hitachi , Ltd.
LandOfFree
Semiconductor memory having multiple continuous access functions does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory having multiple continuous access functions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory having multiple continuous access functions will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-182721