Patent
1990-07-03
1992-02-18
Carroll, J.
357 234, 357 53, 357 86, H01L 2910, H01L 2978, H01L 2968, H01L 2940
Patent
active
050898710
ABSTRACT:
The present invention relates to an increased operating voltage MOS semiconductor device. The device has a channel forming area between a source and extended drain area, a gate insulating film over the channel forming area and the drain area with a thicker portion over the drain area, and a gate electrode over the gate insulating film, thereby preventing an excess field concentration from existing in the extended drain region. The field concentration may be further reduced by forming a relaxation area underneath the juncture between the thick and thin portions of the gate insulating film below the surface of the drain area.
REFERENCES:
patent: 4823475 (1989-04-01), Keasom
patent: 4941026 (1990-07-01), Temple
Carroll J.
Fuji Electric & Co., Ltd.
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