Semiconductor memory device having serial addressing scheme

Details Semiconductor memory device having serial addressing scheme Semiconductor memory device having serial addressing scheme

1986-12-22

1989-01-31

Hecker, Stuart N.

Static information storage and retrieval

Addressing

365239, 365240, G11C 700, G11C 800, G11C 1140

Patent

active

048021342

ABSTRACT:
A semiconductor memory of the type that a plurality of memory locations are sequentially addressed in synchronism with a chain of clock pulses without externally applied address signals is disclosed. The memory is provided with a detection circuit for detecting a selection of a predetermined memory location and thus it is allowed for user to know which memory location has been addressed.

REFERENCES:
patent: 4330852 (1982-05-01), Redwine et al.
patent: 4429375 (1984-01-01), Kobayashi et al.
patent: 4611299 (1986-09-01), Hori et al.
patent: 4633441 (1986-12-01), Ishimoto
patent: 4667313 (1987-05-01), Pinkham et al.
patent: 4688197 (1987-08-01), Novak et al.

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