Semiconductor memory device having pulse width control circuit

Details Semiconductor memory device having pulse width control circuit Semiconductor memory device having pulse width control circuit

1988-02-08

1989-01-31

Hecker, Stuart N.

Static information storage and retrieval

Addressing

365233, 365189, G11C 700, G11C 800

Patent

active

048021318

ABSTRACT:
A semiconductor memory device including an address change detection circuit and a pulse width control circuit. The pulse width control circuit inhibits the passage of write enable signals having a short pulse width for a predetermined period from the change of the address. After the predetermined period, the control operation in the pulse width control circuit is overridden. Therefore, the write cycle time can be kept down.

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patent: 4298961 (1981-11-01), Hotta et al.
patent: 4337523 (1982-06-01), Hotta et al.
patent: 4337525 (1982-06-01), Akatsuka
patent: 4355377 (1982-10-01), Sud et al.
patent: 4479200 (1984-10-01), Sato et al.
patent: 4480321 (1984-10-01), Aoyama
patent: 4573147 (1986-02-01), Aoyama et al.
European Search Report, EP 85303838, The Hague, 10-21-86.
Patents Abstract of Japan, vol. 8, No. 175 (P-321) [1712], Dec. 15, 1984.
Patents Abstracts of Japan, vol. 1, No. 103, Sep. 13, 1977.

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