Dynamic current divider circuit with current memory

Details Dynamic current divider circuit with current memory Dynamic current divider circuit with current memory

1991-02-19

1992-02-18

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307255, 3072966, 307584, 307270, H03K 1756

Patent

active

050897187

ABSTRACT:
Dynamic accurate current divider which comprises current memory circuits (M2-C1-S3, M3-C2-S4) by means of which an input current (Iin) to be split up is divided into two almost equally large output currents (Iout1, Iout2). Under the control of a clock generator (9) having two-phase switching cycles, any inequalities in the output currents are equalized by means of the current memory circuits in a number of cycles of the clock generator.

REFERENCES:
patent: 3839648 (1974-10-01), Pace
patent: 3986051 (1976-10-01), Okada et al.
patent: 4112315 (1978-09-01), Ohhinata
patent: 4349750 (1982-09-01), Geurts
patent: 4590433 (1986-05-01), Kusakabe
patent: 4958123 (1990-09-01), Hughes
patent: 4973978 (1990-11-01), Jordan
patent: 5012133 (1991-04-01), Hughes
patent: 5021692 (1991-06-01), Hughes

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