MOS transistor circuit

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G06F 750

Patent

active

048021121

ABSTRACT:
When a carry signal generated in an n-th bit is propagated to an (n+1)th bit, two n-MOS transistors (12.sub.n+1 and 13.sub.n+1) connected by a signal line (C.sub.n) are turned on to prompt transition of the signal line (C.sub.n) to a zero potential, thereby to increase the speed for propagating the carry signal. When the signal line (C.sub.n) propagates no carry signal, a p-MOS transistor (11.sub.n+1) is turned on to pull up the signal line (C.sub.n) to a supply potential V.sub.CC, thereby to stabilize the potential thereof.

REFERENCES:
patent: 3767906 (1973-10-01), Pryor
patent: 4152775 (1979-05-01), Schwartz
patent: 4471454 (1984-09-01), Dearden et al.
patent: 4471455 (1984-09-01), Oshkhunian et al.
patent: 4601007 (1986-07-01), Uya et al.
patent: 4677584 (1987-06-01), Steck
patent: 4685079 (1987-08-01), Armer

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